In order to ensure the quality and stability of the wafer, a wafer acceptance test (WAT) of the wafer is necessary. WAT test is an electrical test for a test structure on the wafer after completing the manufacturing process of the wafer. Based on WAT data analysis, it can effectively detect the problems of the semiconductor process technology to facilitate the adjustment and optimization of process technology.
Dicing is performed on wafer after the WAT test. The technology of dicing has been developed to a high standard. One restriction of dicing is the resulting cracks extending laterally from the dicing line into the semiconductor and insulating materials. Following these cracks, moisture and contamination are free to penetrate active circuitry and will start degrading the electrical device performance. Even today, this generation of cracks is the most significant limitation with respect to minimizing circuit chips. In addition, the cracks also represent significant reliability risks, since they tend to grow and widen under thermal and mechanical stress and thus eventually imperil the functionality of the integrated circuit.
Accordingly, it is essential to improve the crack problem of the wafer after the dicing process.